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Chapter 1: XM104
Table 1-13:
Si5368 Clock I/O Connections to FMC HPC Connector J1 (Cont’d)
FMC Connector J1
Pin
G10
G9
H8
H7
Signal Name
LA03_N
LA03_P
LA02_N
LA02_P
I/O Standard
LVCMOS_Vadj
LVCMOS_Vadj
LVCMOS_Vadj
LVCMOS_Vadj
Si5368 In/Out
Output
Output
Output
Input
Si5368
C3B
C2B
C1B
RESET_B
Notes:
1. These signals are either inputs or outputs to the Si5368 depending upon the state of an internal Si5368 register.
The Si5368 does not provide any clock outputs to the board without first going through
internal register initialization via the serial IIC bus interface from the bus master. Asserting
the reset input also requires re-initialization of the Si5368 registers to re-establish clock
outputs. The Si5368 is located at IIC address 0x68.
For additional application information on the Si5368 component see the manufacturer's
data sheet at www.silabs.com .
20
www.xilinx.com
FMC XM104 Connectivity Card User Guide
UG536 (v1.1) September 24, 2010
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